1. Field of the Invention
The present invention relates to semiconductor devices, intermediate structures in the fabrication thereof and components and fabrication methods therefor. More particularly, the invention pertains to methods for fabricating packaged radiation sensing or emitting devices, cameras including same, and the like, intermediate structures at the wafer or bulk substrate level in the fabrication, frame structures for use in fabrication of the packages and methods of package fabrication.
2. State of the Art
Semiconductor die-based image sensors are well known to those having skill in the electronics/photonics art and, in a miniaturized configuration, are useful for capturing electromagnetic radiation (e.g., visual, IR or UV) information in digital cameras, personal digital assistants (PDA), internet appliances, cell phones, test equipment, and the like, for viewing, further processing or both. For commercial use in the aforementioned extremely competitive markets, image sensor packages must be very small. For some applications, a package of a size on the order of the semiconductor die or chip itself, or a so-called “chip scale” package, is desirable if not a requirement. In addition, the market demands that image sensors provide high quality images, be inexpensive and exhibit low failure rates while accommodating the rough treatment typical of general use, particularly in cameras and other hand-held devices. Unfortunately, the semiconductor industry has yet to achieve these goals in full. Currently available image sensor packages are relatively expensive to manufacture, are significantly larger than the image sensor semiconductor die, and exhibit a failure rate which is unacceptably high, limiting further market penetration through cost reduction.
While traditional semiconductor devices, such as processors and memory, are conventionally packaged in an opaque protective material, image sensors typically comprise a light wavelength frequency radiation-sensitive integrated circuit (also termed an “optically sensitive” circuit) fabricated on the active surface of a semiconductor die covered by a planar, optically transmissive element, wherein the image sensor is positioned to receive light radiation from an external source. Thus, one surface of the image sensor package conventionally comprises a transparent portion, which usually is a lid of light-transmitting glass or plastic. For photographic purposes, the chip is positioned to receive focused radiation from an optical lens associated therewith. The semiconductor circuit is typically one of a charge coupling device (CCD) or a complementary metal oxide semiconductor (CMOS), the latter exhibiting distinct advantages over the former and being the currently preferred sensor used in the image-sensing art.
Various factors are considered in the design and manufacture of image sensor packages. For example, the extent that the packages can be at least partially, if not completely, fabricated at the wafer level is a substantial cost consideration. Furthermore, if the package design or fabrication approach, even if conducted at the wafer level, necessitates that all of the image sensor semiconductor dice located thereon be packaged regardless of whether a significant number of the dice are defective, a substantial waste of materials results. Also, the package lids (e.g., windows) as well as one or more associated lenses (when included in an image sensor package) must be carefully positioned relative to the optically sensitive circuit on each of the dice to achieve uniformly high quality imaging while precluding entry of moisture and other contaminants into the chamber defined between the optically sensitive circuitry and the package lid. Other considerations include those which relate to die packaging in general, including the need for moisture resistance in the package as a whole and adequate physical protection of the integrated circuitry, as well as elimination of resin flash and outgassing problems. Further, the packaging must provide adequately robust connectors for effecting uniformly high quality electrical connections to higher-level packaging.
A conventional method for packaging a semiconductor element is depicted in U.S. Pat. No. 6,262,479 to Li-Kun Chou. As shown therein, a die “seat” is first mounted on a substrate, together with metal traces extending to the edge of the substrate, and over the edge surfaces. A thin liner of insulative material is then applied about the periphery of the upper surface of the substrate. A peripheral wall of molding compound is then applied over the liner. A semiconductor, such as an image sensor die, is then fixed to the substrate, and the bond pads thereof are wire-bonded to the metal conductors on the substrate. A cover glass is then adhesively attached over the peripheral wall to enclose the die.
As shown in U.S. Pat. No. 6,353,257 to Huang, an image sensor chip may be attached to a conductive lead frame, with its bond pads wire-bonded to the lead frame. The lead frame is then placed in a mold where a body is formed about the lead frame with a shouldered upper opening over the chip. A cover glass is then adhesively attached to the upper rim of the molded body.
In U.S. Pat. No. 6,727,487 to Yamaguchi et al., a CMOS image sensor is described wherein a sensor chip with peripheral bond pads is attached to a printed circuit board, and peripheral bond pads are wire-bonded to circuit board metallization. An array of flat color filters and microlens is placed over the active sensor area and nearly extends to opposing rows of peripheral bond pads. A lens mounted in a four-legged holder may then be placed directly on the microlens layer to maintain a uniform focusing distance between the active area and lens. Packaging of the device is not in view.
U.S. Pat. No. 6,713,857 to Tsai describes a stacked two-chip package in which a substrate is first formed with metal leads on each side, and has an opening therein. Adhesive tape is attached to the substrate to cover the opening, and a first chip is attached to the tape within the opening. A second chip such as an image sensor chip is then attached to the opposite side of the adhesive tape. The bond pads of each chip are wire-bonded to metallization on the respective surfaces of the substrate. Encapsulant is formed about the first chip and its wire bonds. An encapsulant is formed about the edges of the substrate, forming a wall enclosing the second chip. A cover is then attached to the wall, and may be optically conductive.
In U.S. Pat. No. 6,730,536 to Glenn et al., a method for forming an image sensor package is disclosed in which a central through-aperture is formed in a substrate. Electrically conductive traces are formed on the lower surface of the substrate, and include tabs projecting inwardly under the central aperture. An image sensor stall is flip-chip mounted to the tabs by bumps. A window is then mounted over the optically active portion of the image sensor chip. Holes through the substrate intersect the lower surface traces, and are filled with solder which projects upwardly from the substrate as solder balls.
In U.S. Pat. No. 6,649,991 to Chen et al., a method is disclosed for making an image sensor package with a vision chip mounted on a multi-layer resin-mask organic substrate. The chip's peripheral bond pads are wire-bonded to conductors on the substrate. A transparent window is mounted over a large portion of the vision chip, including the optically active area. The bond wires and adjacent areas are encapsulated in a wire shielding block, up to the window edges. A liquid encapsulant is then applied to cover the block and edges of the window to seal it in place.
U.S. Pat. No. 6,503,780 to Glenn et al., a wafer scale image sensor package fabrication method is described, in which an image sensor is formed by placing a cover glass in a hardenable layer atop the active sensing area on the chip. The package is then molded about the die, sensing area and cover glass.
Despite advances in the state of the art of image sensor packaging, there remains a need for a high-yield packaging technique which may be effected at a wafer level and provides robust, high quality image sensor packages.